Finance & Markets
Semiconductors — Industry Deep Dive (June 2026)
Covers: Industry structure, supply chain bottlenecks, geopolitics, key companies, emerging technologies, demand sectors, and investment angle. See energy-commodities for the AI-power-nuclear convergence thesis, financial-markets for macro context, and market-intelligence for current price action
Semiconductors — Industry Deep Dive (June 2026)
Covers: Industry structure, supply chain bottlenecks, geopolitics, key companies, emerging technologies, demand sectors, and investment angle. See [[energy-commodities]] for the AI-power-nuclear convergence thesis, [[financial-markets]] for macro context, and [[market-intelligence]] for current price action.
Industry Overview
Where We Are in the Cycle
The 2026 semiconductor market is not a traditional boom-bust cycle. It has structurally bifurcated. AI infrastructure spending has permanently elevated the demand baseline — what some analysts call an "AI Supercycle." The old model of a single unified cycle driven by PC or smartphone refresh is obsolete.
Two parallel markets now exist:
- AI/HPC silicon: Hypergrowth, supply-constrained, pricing power, >50% gross margins
- Everything else (automotive, industrial, consumer, analog): Soft-to-recovering from the 2022–2023 inventory correction, traditional cyclical patterns intact
Market size (2026 consensus):
- SIA/Deloitte consensus: ~$975 billion, up ~26% from 2025
- IDC (aggressive): $1.29 trillion — inflated by aggressive memory pricing assumptions
- Conservative (Fortune BI): ~$700 billion (narrower definitions)
The $975B figure is the most widely cited. For context: the entire industry was ~$580B in 2022.
Key segment breakdown (IDC, 2026):
| Segment | Revenue | YoY |
|---|---|---|
| Data centre (total) | $477B | +80%+ |
| AI accelerators (GPU/ASIC/HPC) | ~$500B combined | +~70% |
| HBM memory | $54.6B | +58% |
| Standard DRAM/NAND | Recovering | Prices spiking from HBM diversion |
| Mobile | $89.8B | Declining |
| Automotive | Growing | SiC +30%+ pa |
| IoT/Industrial | $136.6B | Recovering |
Advanced process capacity (sub-7nm) is forecast to grow 69% through 2028 (SEMI data), with total fab capacity CAGR of 7% reaching 11.1 million wafers/month.
Supply Chain Bottlenecks
Three hard physical chokepoints limit how many AI chips can ship in 2026:
1. CoWoS Advanced Packaging — The Most Acute Bottleneck
CoWoS (Chip-on-Wafer-on-Substrate) is the dominant advanced packaging technology for AI GPUs and ASICs. TSMC is aggressively scaling:
- Late 2024: ~35,000 wafers/month
- End-2026 target: ~130,000 wafers/month (~3.7x in two years)
- Yet NVIDIA alone has reserved ~60% of total global CoWoS output, with ~595,000 CoWoS wafers booked for 2026
CoWoS-L (for larger interposers in Blackwell/Rubin) introduced new warpage and signal-integrity challenges that TSMC has largely resolved in early 2026 production. OSATs ASE Group and Amkor are seeing packaging revenues double as TSMC outsources sub-steps to relieve backlog.
The implication: The constraint on AI chip shipments is often not the logic wafer but the packaging step. This makes CoWoS capacity expansion the single most watched operational metric in the AI semiconductor supply chain.
2. HBM Memory Supply
HBM (High Bandwidth Memory) is the AI chip's memory — stacked DRAM dies bonded directly to the GPU/accelerator die. Without HBM, there is no AI chip.
- HBM now consumes 23% of all DRAM wafer capacity globally
- Goldman Sachs projected a 4.9% DRAM supply-demand gap for 2026 — the worst in 15 years
- HBM3E contract prices rose ~20% for 2026
- HBM4 mass production began in 2026 but volumes remain limited
- SK Group Chairman: the wafer shortage may persist until 2030
The HBM bottleneck directly caps how many AI GPUs and accelerators can ship per quarter.
3. TSMC Leading-Edge Wafer Allocation
TSMC 2nm and 3nm capacity is fully sold out for 2026. Total 2nm capacity across Taiwan fabs is ~100,000 wspm — all committed. The queue for N2 slots includes Apple, NVIDIA, AMD, and hyperscaler custom ASICs. No new customer can get meaningful allocation until 2027 at the earliest.
Other Material Bottlenecks
| Material | Issue |
|---|---|
| Silicon Carbide (SiC) substrates | 200mm SiC wafer yields at 60–70%; EV ramp demand outpacing supply |
| Gallium & Germanium | China restricted exports 2023–2024; shortages persist, affecting US supply chains |
| EUV photoresists | EUV-grade resists (JSR, Shin-Etsu, Merck KGaA) in tight supply as EUV volumes scale |
| GaN-on-Si epitaxial wafers | Limited high-yield supply constraining GaN power device ramp |
| Advanced substrates | Organic substrates for CoWoS packages are themselves a sub-bottleneck |
Key Supporting Industries
Lithography — ASML (Monopoly)
ASML holds a de facto global monopoly on EUV and the new High-NA EUV systems. No competitor exists or is plausible before 2032+.
- Low-NA EUV (Twinscan NXE series, 0.33 NA): The current workhorse for 3nm and 5nm production
- High-NA EUV (Twinscan EXE:5200, 0.55 NA): First high-volume shipments in February 2026 to Intel and Samsung at $350–400 million per unit. Enables ~8nm resolution half-pitch — essential for angstrom-era nodes (Intel 18A/14A, TSMC N2P and beyond)
- Hyper-NA: ASML has already unveiled a next-generation system beyond 0.55 NA for post-2030 nodes
ASML 2026 targets: 60+ EUV shipments (vs. 48 in 2025); full-year revenue guidance raised to €36–40B; Q1 2026 net sales €8.8B. Plans to deliver 10 High-NA units in 2027.
ASML is arguably the single most irreplaceable company in the entire semiconductor supply chain after TSMC.
Wafer Equipment (AMAT, Lam Research, KLA, Tokyo Electron)
| Company | Specialty | 2026 EPS Estimate | Analyst View |
|---|---|---|---|
| Applied Materials (AMAT) | Deposition, etch, CMP, implant | $10.45 | MS Overweight upgrade 2026 |
| Lam Research | Etch, deposition (particularly memory) | $5.43 | Record revenue March 2026 quarter |
| KLA Corporation | Inspection, metrology | $39.03 | MS downgraded on valuation |
| Tokyo Electron (TEL) | CVD, ALD, photoresist coating/developing | — | Critical for 3D NAND and logic |
All four benefit from the advanced node capex super-cycle and GAA transistor complexity (which requires more etch, deposition, and inspection steps per wafer than FinFET).
Wafer Suppliers
Shin-Etsu Chemical and Sumco dominate 300mm silicon wafer supply globally. Despite the AI boom, silicon wafer shipments grew only ~5.4% in 2025 — reflecting that AI chip value is concentrated in a small area of expensive leading-edge wafers, not commodity wafer volume. Both companies benefit from long-term supply agreements with TSMC and Samsung.
EDA Software (Synopsys, Cadence)
The EDA duopoly is structurally advantaged — every new chip requires EDA tools. UCIe 2.0 chiplet complexity, GAA device physics, and 3D-IC design rules are all expanding EDA content per design. Synopsys and Cadence are compounding quietly while the market focuses on GPUs.
Specialty Materials
| Company | Material | Moat |
|---|---|---|
| JSR (private, INCJ) | EUV photoresists | Duopoly with Shin-Etsu; mission-critical |
| Shin-Etsu Chemical | Photoresists + silicon wafers | Vertical integration |
| Tokyo Ohka Kogyo (TOK) | Photoresists, CMP slurries | EUV specialisation |
| Merck KGaA | EUV photoresists, specialty gases | German chemical giant |
| Screen Holdings | Photoresist coating/developing tools | Under-followed niche; bottleneck in advanced lines |
Geopolitics & Key Countries
United States
CHIPS Act fabs in progress:
- TSMC Arizona Fab 1 (N4): Operational and producing for Apple and NVIDIA
- TSMC Arizona Fab 2: Construction complete; equipment installation Q3 2026; targets 3nm production in 2027 (one year ahead of original schedule)
- Intel Ohio: Delayed into late 2020s; cost overruns under CHIPS Act scrutiny
- Samsung Texas (Taylor): Ramping; 2nm yields at 50–60% range; Q1 2026 utilisation 80%
The US dependency on Taiwan has been reduced but not eliminated. TSMC Arizona produces a small fraction of global leading-edge capacity and cannot substitute Taiwan in a conflict scenario.
Taiwan — Existential Risk Node
Taiwan produces >90% of advanced process chips globally. The US has effectively integrated Taiwan into a tech alliance through CHIPS Act investments, export controls, and TSMC's Arizona commitment. Any military action affecting Taiwan would collapse advanced chip supply globally — there is no near-term substitute. Taiwan remains the single largest geopolitical risk factor in the semiconductor industry.
South Korea
- SK Hynix: Dominant AI memory company (62% HBM market share). New Cheongju M15X fab under construction. Posted record Q1 2026 profits. The world's most important AI memory supplier.
- Samsung: Fighting yield battles at 2nm and 3nm GAA but improving. Taylor fab ramping. Still producing Exynos 2600 on 2nm for Galaxy S26 devices.
Korea's government is providing additional fab subsidies to match US CHIPS Act competitiveness.
Japan — Revival in Progress
Japan has re-emerged as a semiconductor power through deliberate industrial policy:
| Initiative | Status (June 2026) |
|---|---|
| TSMC Kumamoto Fab 1 (12–28nm) | Profitable as of Q1 2026; automotive/industrial focus |
| TSMC Kumamoto Fab 2 | $17B investment; upgraded from 6nm to 3nm (AI demand); equipment install target 2028 |
| Rapidus | ¥2.354 trillion ($15.6B+) total government support; successfully demonstrated GAA operation on 2nm-class wafers (July 2025); pilot line running; mass production target FY2027 |
Rapidus's strategy is geographic diversification of foundry risk — not beating TSMC on cost, but offering a non-Taiwan advanced node option for customers who need it. Will be ~2 years behind TSMC/Samsung at launch. Partners include Fujitsu and Tenstorrent.
China — The Long Game
China's semiconductor strategy is a two-track approach: circumvention in the short term, indigenisation in the long term.
Near-term (SMIC + Huawei):
- SMIC operating 7nm DUV multi-patterning with yields of 20–40%; developing 5nm capability
- Advanced node capacity growing from ~45k wspm in 2025 to ~80k wspm by 2027
- Huawei targeting 1.6 million Ascend AI logic dies in 2026
- Huawei used shell companies to trick TSMC into manufacturing ~2 million chiplets for Ascend 910 AI processors — TSMC has since tightened controls
- Big Fund III: $47.5B Chinese government semiconductor fund to accelerate this build-out
Long-term (RISC-V + CXMT):
- China is aggressively building domestic RISC-V capability, bypassing x86/ARM ISA licensing restrictions
- XiangShan "Kunminghu" RISC-V processor rivals ARM Neoverse N2 performance
- 600+ hardware and 400+ software RISC-V researchers assembled at Chinese Academy of Sciences
- CXMT (Changxin Memory Technologies) is attempting to develop HBM — if successful, would pressure SK Hynix/Micron HBM pricing by late 2027
At 7nm DUV with 20–40% yields, China is 3–4 nodes behind the frontier but closing slowly. The RISC-V ecosystem is the more credible long-term threat to US chip hegemony.
Netherlands (ASML)
The Dutch government has restricted DUV (older) machine exports to China under US pressure. This does not restrict most of ASML's 2026 revenue (advanced EUV was never sold to China), but reduces China's DUV access and creates diplomatic friction. Key tension: China was historically ASML's largest DUV customer.
India — ATMP First, Fab Later
India is taking a phased approach: package-and-test before fabrication.
- Micron Sanand ATMP: Inaugurated February 28, 2026 — India's first operational semiconductor facility. Scaling from tens of millions to hundreds of millions of chips tested/assembled per year by 2027.
- Tata Electronics + PSMC (Powerchip): Targeting first silicon at Dholera (Gujarat) in late 2026 on 300mm wafers. Full fab completion 2028.
- Budget 2026–27: Rs 8,000 crore (~$960M) semiconductor allocation — largest ever single-year outlay.
India is a 5–10 year play for meaningful fab capacity; more immediately relevant as an ATMP (assembly, test, mark, pack) hub.
Key Companies
TSMC — The Indispensable Layer
The unchallenged global foundry leader. Market share in leading-edge logic: ~90%+.
- 2nm (N2): ~100,000 wspm across Taiwan fabs; fully committed for 2026. Customers: Apple, NVIDIA, AMD, hyperscaler ASICs
- Arizona Fab 2: 3nm target 2027 (pulled forward one year from 2028)
- Arizona Fab 3: 2nm/A16 target 2027–2028
- Capex: $52–56 billion in 2026 alone — the largest in history for any foundry
- A16 node (next gen): Incorporates backside power delivery networks (BSPDN); targeting 2027
- N1.4 roadmap: TSMC accelerating sub-2nm development
No other company can produce AI chips at scale in 2026. TSMC's risk is political (Taiwan), not technological.
NVIDIA — The AI Chip Monopoly
Controls ~70–75% of data-centre AI accelerator revenue.
- Blackwell (H200/B200/B300): Current generation; fully ramped
- Rubin (R100/R200): H2 2026 production on TSMC's most advanced nodes. 50 PFLOPS FP4 (vs. 20 PFLOPS Blackwell), 5x inference uplift, 3.5x training uplift. Rubin Ultra: 100 PFLOPS
- Feynman (2028): Next architecture already teased
- Valuation: Trailing P/E ~31–41x (June 2026) — 41% below its own 10-year historical average P/E. Forward P/E ~23x with 50%+ net margins and near-monopoly on AI training infrastructure
NVIDIA's Achilles heel is customer concentration: ~5 hyperscaler customers represent most of its revenue.
AMD — The Challenger
- MI400 series (5 variants): Flagship MI455X — 320B transistors, 40 PFLOPS FP4, 432GB HBM4, 19.6 TB/s bandwidth
- AI GPU revenue projected ~$7.2B in 2026 (~6–8% data-centre GPU market share)
- Secured design wins with OpenAI and xAI as "second supplier" diversification
- Core challenge: CUDA software ecosystem lock-in. AMD's ROCm is improving but ~3 years behind in software depth
Intel — The Comeback Attempt
2026 is Intel's make-or-break execution year under CEO Lip-Bu Tan.
| Milestone | Status |
|---|---|
| 18A node (GAA + BSPDN) | High-volume production since Oct 2025; yields 65–75% and improving ~7%/month |
| Panther Lake (18A CPUs) | Shipping for laptops with 200+ system designs |
| Clearwater Forest (18A server) | Launched March 2026 — first 18A server CPU |
| Nova Lake (desktop) | Outsourced to TSMC N2 — credibility problem for Intel Foundry |
| 14A node | Two customers have early PDK access; decisions expected H2 2026 |
| NVIDIA 18A testing | Halted December 2025 — Intel must win other marquee customers |
Intel is deep value if 18A/14A foundry strategy works; a value trap if it doesn't. 2027 will be the verdict year.
Samsung — The Yield Battle
Deeply challenged in leading-edge foundry.
- 3nm yields: Below 50% (vs. TSMC's 60–70%)
- 2nm yields: Improved from ~30% to ~50–60% in 2026 — sufficient for Exynos 2600 (Galaxy S26)
- Taylor, Texas fab: 80% utilisation in Q1 2026 with broadening customer mix
- Reports of potential 1.4nm node cancellation raise long-term competitive viability questions
- Samsung Memory (HBM): Third place behind SK Hynix and Micron; yield and supply issues at HBM3E; fighting back with HBM4 ramp
Samsung has the financial capacity and the necessity to fix foundry — but the window is narrowing.
SK Hynix — The HBM King
The AI memory company of the cycle.
- 62% HBM global market share (Micron overtook Samsung for #2 in 2026)
- First HBM4 mass production system secured September 2025
- Supplies HBM3E for Google TPU v7 and NVIDIA Blackwell/Blackwell Ultra
- UBS projects ~70% HBM4 market share for Rubin platform
- Record Q1 2026 profits
- New Cheongju M15X fab under construction for further capacity
SK Hynix is the single most leveraged pure-play to AI chip demand among major listed companies.
Micron — The Catch-Up Play
- ~21% HBM market share (now #2, overtook Samsung)
- Key differentiator: ~30% lower power consumption than competitors' HBM3E — critical for AI accelerator power budgets
- HBM4 samples shipped; capacity nearly sold out for 2026
- India Sanand ATMP facility operational
- Trades at a valuation discount to SK Hynix despite closing the technology gap — a potential opportunity
Broadcom — The Custom ASIC Giant
- AI revenue Q1 FY2026: $8.4B (+106% YoY)
- CEO Hock Tan: "line of sight to AI chip revenue in excess of $100B in 2027"
- $73B AI backlog disclosed
- Controls 70%+ of custom AI ASIC design services market
- XPU customers: Google (TPU), Meta, OpenAI, Anthropic, Apple
- Custom ASIC server shipments: 27.8% of AI server market in 2026, growing 44.6% YoY — nearly 3x the GPU server growth rate
Broadcom is the dominant alternative to NVIDIA for hyperscalers building vertically-integrated AI silicon stacks. Less glamorous than NVIDIA, potentially more durable.
Marvell — The ASIC #2
- AI ASIC revenue projected $9–11B in 2026
- Key wins: Amazon Trainium, Microsoft Maia
- ~20–25% of custom AI ASIC design market
- Direct beneficiary of hyperscaler desire to reduce NVIDIA dependency
Emerging Technologies
Gate-All-Around (GAA) Transistors
GAA nanosheet transistors wrap the gate on all four sides of horizontally stacked silicon nanosheets. They replace FinFETs at the most advanced nodes.
- The GAA era began in 2025–2026 across TSMC N2, Samsung 3GAP/2nm, and Intel 18A
- TSMC N2 is the industry's leading-edge GAA node in volume production
- GAA transistor market: ~$763M in 2026 → $971M by 2028 → $1.5B+ by 2032
- Every GAA node requires more etch, deposition, and inspection steps per wafer — directly benefiting AMAT, Lam, KLA, TEL
Backside Power Delivery Networks (BSPDN)
Power rails routed beneath the silicon substrate rather than on the frontside, freeing frontside routing for signal interconnects. Intel 18A and TSMC's upcoming A16 node both use BSPDN. Dramatically improves power efficiency and logic density. This is becoming a defining feature for post-2026 leading-edge nodes.
Chiplets + UCIe 2.0
Chiplets are disaggregated chips — separate dies bonded together in a single package. UCIe 2.0 standardises die-to-die electrical interconnects, enabling mix-and-match chiplets from different foundries and process nodes.
As of 2026, chiplet architecture is the mainstream approach for AI accelerators: NVIDIA Blackwell/Rubin, AMD MI400, Intel Xeon, all custom HPC chips. The UCIe 2.0 roadmap includes silicon photonics for optical inter-chiplet communication.
Silicon Photonics & Co-Packaged Optics (CPO)
As rack-scale AI bandwidth demand hits 800G and approaching 1.6T transceiver cycles, optical interconnects are transitioning from niche to mainstream. Co-packaged optics (CPO) integrates optics directly onto the chip package, eliminating copper trace latency and power loss.
This is the "next bottleneck" after HBM and CoWoS — and an underfollowed investment opportunity. Key players: Coherent, Lumentum, Fabrinet, II-VI (now Coherent). Fabricated Knowledge's 2025 retrospective: optics stocks led the market dramatically (LITE +331%, Fabrinet +107%).
RISC-V
Open-source ISA with ~25% global market penetration in 2026. China is the most aggressive adopter but adoption is global. Key use cases: IoT, edge AI, automotive MCUs, industrial controllers. China's XiangShan "Kunminghu" processor rivals ARM Neoverse N2. RISC-V is not a near-term threat to x86/ARM in high-performance computing but is the dominant embedded/edge architecture trend.
Pre-Commercial Technologies (2030+)
| Technology | Status | Timeline |
|---|---|---|
| Quantum chips | NISQ era; early fault-tolerant experiments | Not investable; 10+ years from commercial scale |
| Neuromorphic chips | Research-stage (Intel Loihi, IBM) | 5–10 years from niche commercial use |
| 2D materials (MoS₂, graphene) | Lab demonstrations at sub-1nm scale | 8–15 years from production |
Key Demand Sectors
AI / HPC — The Dominant Driver (~50% of industry revenue)
- Training vs. inference shift: 2024–2025 was dominated by large-scale AI training (giant GPU clusters). 2026 sees inference demand accelerating as deployments scale globally. Inference optimises for different things — lower precision, lower latency, cost-per-token — but still consumes enormous chip volumes.
- Custom ASICs gaining ground: Google TPU v7, AWS Trainium 2, Meta MTIA, Apple silicon are all custom ASICs taking share from merchant GPUs in inference workloads. Broadcom and Marvell are the primary beneficiaries.
- Hyperscaler capex context: Oracle committed $100B over four years; OpenAI projects $115B cumulative burn through 2029. This is the demand engine driving the entire AI silicon ecosystem.
Automotive — SiC Power Semiconductors
- EV adoption driving 30%+ annual growth in automotive SiC power devices
- 200mm SiC wafer yields at 60–70% — constrained supply vs. EV ramp demand
- Key players: ON Semiconductor (leading 900V EV architecture), Infineon, STMicroelectronics, ROHM, Mitsubishi Electric
- Wolfspeed remains financially challenged despite being a leading SiC manufacturer
- Non-EV automotive (ADAS, radar, MCUs) soft due to 2022–2023 inventory overbuild — still digesting
Defense & Aerospace
Radiation-hardened chips, secure processing, and domestic-sourced silicon are growing demand drivers. US export controls are creating a captive domestic market for defense-grade semiconductors.
Edge AI & Smartphones
Mobile semiconductor revenues declining in aggregate ($89.8B in 2026) but AI NPU content per device is increasing. Every premium smartphone now contains a dedicated on-device AI processor. Edge inference is a growing but structurally lower-margin demand segment vs. data-centre AI.
Challenges
Dangerous Demand Concentration
~$500B in AI chip revenue driven by ~5 hyperscaler customers (Microsoft, Google, Amazon, Meta, Oracle). A slowdown in AI capex commitments — whether from monetisation pressure, regulatory action, or tariff impact — would cause a sharp industry correction. The 2026 boom is historically unusual in being driven by a handful of companies rather than broad consumer/enterprise adoption.
AI Circular Financing Risk
A subtle systemic risk: NVIDIA equity is used as collateral for debt financing → that debt finances GPU purchases → those GPU purchases inflate NVIDIA's revenue and equity valuation. CoreWeave CDS spreads widened in late 2025, signalling credit market skepticism about AI infrastructure leverage sustainability. If this dynamic reverses, it creates a feedback loop downward.
Power Infrastructure — Emerging Co-Constraint
Global data centre power demand projected at 1,050 TWh by year-end 2026 (IEA), with AI operations consuming >40%. Individual GPU rack power draw surged from 10–14 kW to 100+ kW. 92 GW of additional power capacity needed by 2027. Water use projected at 450M gallons/day by 2030 for cooling. Liquid cooling (direct-to-chip, immersion) is being deployed rapidly — but grid capacity is increasingly the binding constraint, not chip supply. This is why the uranium/nuclear thesis and the semiconductor thesis converge on the same demand driver.
Geopolitical Risk
Taiwan concentration risk is existential. Any military conflict or blockade affecting TSMC would collapse advanced chip supply globally with no near-term substitute. The US-China chip war is escalating bilaterally: the US tightens controls while China accelerates RISC-V, SMIC capacity, and circumvention strategies.
Talent Shortages
Semiconductor engineers (process, design, EDA, advanced packaging) are acutely insufficient to support the pace of global fab construction. This is the most binding constraint on execution timelines in the US, Japan, and India — where fab construction is outpacing local talent pools.
Valuation & Market Structure Risk
| Risk | Details |
|---|---|
| AI chip bubble | Extreme concentration in 5 customers; any capex moderation cascades through the stack |
| HBM pricing cliff | CXMT (China HBM entrant) + Samsung/Micron catch-up could compress SK Hynix/Micron margins by late 2027 |
| Samsung Foundry viability | Potential 1.4nm cancellation would leave only TSMC at the frontier — good for TSMC, bad for industry health |
| Export control whiplash | Trump administration shifted to case-by-case licensing for H200/MI325X chips in Jan 2026, then imposed 25% tariffs — policy unpredictability adds risk premiums |
Investment Angle
Valuation Spread: Where Is the Money
| Segment | Representative Names | Forward P/E | Assessment |
|---|---|---|---|
| AI Fabless | NVIDIA, Broadcom, AMD, Marvell | 23–85x | NVIDIA paradoxically cheapest at 23x given monopoly + 50% margins; others stretched |
| Equipment | ASML, AMAT, Lam, KLA, TEL | 25–35x | ASML deserves premium (monopoly); AMAT most undervalued in group |
| IDMs | Intel, Samsung | Deep discount | Binary risk/reward; Intel is value or value trap depending on 18A/14A execution |
| Memory | SK Hynix, Micron, Samsung | Cyclical premium | SK Hynix priced for HBM leadership; Micron at discount despite closing gap |
| OSATs/Packaging | ASE Group, Amkor | Moderate | Most systematically undervalued relative to strategic role |
Most Overvalued / Crowded
- AI GPU ecosystem broadly: Extreme hyperscaler concentration, circular financing risks
- HBM memory stocks: Priced for shortage through 2027–2028; Chinese HBM entrant (CXMT) is a medium-term margin risk
- Broad semiconductor ETFs (SMH, SOXX): Blend AI-exposed and non-AI names at AI multiples
Potential Opportunities — Even at Inflated Multiples
1. NVIDIA (NVDA) Counterintuitively, may be the cheapest large-cap semiconductor stock at 23x forward P/E — 41% below its own 10-year average P/E — with 50%+ net margins and no credible GPU competitor in AI training. Structural monopoly on the highest-margin compute workload in history. Dan Loeb (Third Point) publicly argues undervaluation. Risk: hyperscaler concentration, AI capex moderation.
2. Advanced Packaging OSATs — ASE Group, Amkor Technology Revenues doubling as TSMC outsources CoWoS sub-steps. Lower valuation multiple than leading-edge fabs; directly leveraged to every AI chip shipment. The CoWoS bottleneck isn't going away — it's a structural growth tailwind for at least 3 years. Under-owned and under-covered.
3. Silicon Photonics / Optical Networking — Coherent, Lumentum, Fabrinet The "next bottleneck" after HBM and CoWoS. 800G→1.6T transceiver upgrade cycle ongoing. CPO (co-packaged optics) is entering mass deployment in AI racks. Fabricated Knowledge's 2025 retrospective shows optics led the entire semiconductor market in 2025 (LITE +331%, FN +107%). Volume inflection point appears to be 2026–2027.
4. Specialty Materials — Screen Holdings, TOK, Shin-Etsu (materials division) EUV photoresist, advanced coating tools, and specialty chemicals are mission-critical chokepoints with:
- High barriers to entry (decades of customer qualification)
- Pricing power as EUV volumes scale
- Below-average retail investor coverage Screen Holdings is a particularly under-followed niche equipment supplier — bottleneck in advanced node production lines with no public-market attention.
5. Applied Materials (AMAT) Broad exposure to memory, logic, and advanced packaging capex without NVIDIA's concentration risk. Morgan Stanley Overweight upgrade in 2026. Every advanced node transition (GAA, BSPDN, 3D-IC) increases tool steps per wafer — structurally increasing AMAT's TAM. Less exciting than NVIDIA; more predictable.
6. Micron Technology (MU) Trades at a discount to SK Hynix despite:
- Closing the HBM technology gap (HBM4 sampling)
- ~30% lower power consumption than SK Hynix HBM3E (a differentiating moat for power-constrained AI customers)
- India ATMP facility operational
- HBM4 capacity nearly sold out for 2026
The discount reflects execution history rather than current competitiveness — a potential mispricing.
7. Samsung Foundry (embedded in Samsung Electronics — 005930.KS) Pure deep value option. Binary: if 2nm yields close the gap with TSMC, Samsung Foundry becomes viable and Samsung Electronics rerate sharply. If not, Samsung Foundry may exit advanced logic. The yield improvement trajectory (30% → 50–60% in 2026) suggests progress but pace is uncertain.
Connections
[[energy-commodities]] — Nuclear + AI Power: Data centres running AI training require massive, reliable, low-carbon power. Nuclear energy is emerging as the preferred "clean baseload" for hyperscalers. Microsoft and Google are signing nuclear PPAs. The uranium thesis and the AI semiconductor thesis converge on the same power demand driver. The 1,050 TWh data centre power demand figure makes this connection structural, not incidental.
[[financial-markets]] — Rate sensitivity: Semiconductor stocks (particularly high-multiple fabless names) are long-duration assets highly sensitive to rate expectations. The Iran-driven Treasury yield spike in early 2026 hit SOXX disproportionately. Monitor 10Y yields for risk management.
[[market-intelligence]] — Current positioning: Semiconductor sector has been the highest-returning sector of the AI bull market but is now subject to valuation scrutiny. Watch CoWoS capacity announcements, HBM contract pricing disclosures, and hyperscaler capex guidance for near-term catalysts.
[[ai-in-industry]] — AI demand drivers: The AI application layer (LLMs, multimodal models, agentic AI) is the demand source for AI chips. Continued scaling of AI models is the core thesis assumption. If the AI application layer hits a capability ceiling or monetisation crisis, the semiconductor supercycle thesis breaks.
Related Pages
[[energy-commodities]] | [[financial-markets]] | [[market-intelligence]] | [[ai-in-industry]] | [[economics-and-scarcity]] | [[portfolio-construction]]